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1. general description the 74lv4053 is a triple single-pole double-throw (spdt) analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. it is a low-voltage si-gate cmos device and is pin and function compatible with the 74hc4053 and 74hct4053. each switch has a digital select input (sn), two independent inputs/outputs (ny0 and ny1) and a common input/output (nz). all three switches share an enable input ( e). a high on e causes all switches into the high-impedance off-state, independent of sn. v cc and gnd are the supply voltage connections for the digital control inputs (sn and e). the v cc to gnd range is 1 v to 6 v. the analog inputs/outputs (ny0, ny1 and nz) can swing between v cc as a positive limit and v ee as a negative limit. v cc - v ee may not exceed 6 v. for operation as a digital multiplexer/demultiplexer, v ee is connected to gnd (typically ground). v ee and v ss are the supply voltage connections for the switches. 2. features n optimized for low-voltage applications: 1.0 v to 3.6 v n accepts ttl input levels between v cc = 2.7 v and v cc = 3.6 v n low on resistance: u 180 w (typical) at v cc - v ee = 2.0 v u 100 w (typical) at v cc - v ee = 3.0 v u 75 w (typical) at v cc - v ee = 4.5 v n logic level translation: u to enable 3 v logic to communicate with 3 v analog signals n typical break before make built in n esd protection: u hbm jesd22-a114-c exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n multiple package options n speci?ed from - 40 cto+85 c and from - 40 c to +125 c 74lv4053 triple single-pole double-throw analog switch rev. 04 10 august 2009 product data sheet
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 2 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 3. ordering information 4. functional diagram table 1. ordering information type number package temperature range name description version 74lv4053n - 40 c to +125 c dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 74LV4053D - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74LV4053Db - 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74lv4053pw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 74lv4053bq - 40 c to +125 c dhvqfn16 plastic dual-in line compatible thermal enhanced very thin quad ?at package; no leads; 16 terminals; body 2.5 3.5 0.85 mm sot763-1 fig 1. functional diagram 001aak341 logic level conversion 11 16 v cc 13 1y1 s1 logic level conversion decoder logic level conversion 12 1y0 14 1z 1 2y1 2 2y0 15 2z 3 3y1 5 3y0 43z 10 s2 9 87 v ee gnd s3 6 e
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 3 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 2. logic symbol fig 3. iec logic symbol 001aae125 1y0 12 1y1 s1 13 11 s2 10 s3 9 6 e 2y0 2 2y1 1 3y0 5 3y1 3 3z 4 2z 15 1z 14 001aae126 6 en 11 # # # mux/dmux 12 13 0 1 0/1 0 1 14 10 2 1 15 9 5 3 4 fig 4. schematic diagram (one switch) 001aad544 from logic v cc v ee v ee v cc v cc v ee y z v cc
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 4 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 5. pinning information 5.1 pinning 5.2 pin description fig 5. pin con?guration sot38-4 and sot109-1 fig 6. pin con?guration sot338-1 and sot403-1 fig 7. pin con?guration for sot763-1 74lv4053 2y1 v cc 2y0 2z 3y1 1z 3z 1y1 3y0 1y0 es1 v ee s2 gnd s3 001aak424 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 74lv4053 2y1 v cc 2y0 2z 3y1 1z 3z 1y1 3y0 1y0 es1 v ee s2 gnd s3 001aak342 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aak343 v ee s2 es1 3y0 1y0 3z 1y1 3y1 1z 2y0 2z gnd s3 2y1 v cc transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 8 9 1 16 terminal 1 index area v cc (1) 74lv4053 table 2. pin description symbol pin description e 6 enable input (active low) v ee 7 supply voltage gnd 8 ground supply voltage s1, s2, s3 11, 10, 9 select input 1y0, 2y0, 3y0 12, 2, 5 independent input or output 1y1, 2y1, 3y1 13, 1, 3 independent input or output 1z, 2z, 3z 14, 15, 4 common output or input v cc 16 supply voltage
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 5 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 6. functional description [1] h = high voltage level; l = low voltage level; x = dont care. 7. limiting values [1] to avoid drawing v cc current out of terminal nz, when switch current ?ows into terminals nyn, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current ?ows into terminal nz, no v cc current will ?ow out of terminals nyn, and in this case there is no limit for the voltage drop across the switch, but the voltages at nyn and nz may not exceed v cc or v ee . [2] the minimum input voltage rating may be exceeded if the input current rating is observed. [3] for dip16 packages: above 70 c the value of p tot derates linearly with 12 mw/k. for so16 packages: above 70 c the value of p tot derates linearly with 8 mw/k. for ssop16 and tssop16 packages: above 60 c the value of p tot derates linearly with 5.5 mw/k. for dhvqfn16 packages: above 60 c the value of p tot derates linearly with 4.5 mw/k. table 3. function table [1] inputs channel on e sn l l ny0 to nz l h ny1 to nz h x switches off table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to v ss = 0 v (ground). symbol parameter conditions min max unit v cc supply voltage [1] - 0.5 +7.0 v i ik input clamping current v i < - 0.5 v or v i > v cc + 0.5 v [2] - 20 ma i sk switch clamping current v sw < - 0.5 v or v sw > v cc + 0.5 v [2] - 20 ma i sw switch current v sw > - 0.5vorv sw 74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 6 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 8. recommended operating conditions [1] the static characteristics are guaranteed from v cc = 1.2 v to 6.0 v, but lv devices are guaranteed to function down to v cc = 1.0 v (with input levels gnd or v cc ). table 5. recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage see figure 8 1 3.3 6 v v i input voltage 0 - v cc v v sw switch voltage 0 - v cc v t amb ambient temperature in free air - 40 - +125 c d t/ d v input transition rise and fall rate v cc = 1.0 v to 2.0 v - - 500 ns/v v cc = 2.0 v to 2.7 v - - 200 ns/v v cc = 2.7 v to 3.6 v - - 100 ns/v fig 8. guaranteed operating area as a function of the supply voltages v cc - v ee (v) 0 8.0 6.0 2.0 4.0 001aak344 4.0 2.0 6.0 8.0 v cc - gnd (v) 0 operating area
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 7 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 9. static characteristics [1] typical values are measured at t amb = 25 c. table 6. static characteristics at recommended operating conditions. voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.2 v 0.9 - - 0.9 - v v cc = 2.0 v 1.4 - - 1.4 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v 3.15 - - 3.15 - v v cc = 6.0 v 4.20 - - 4.20 - v v il low-level input voltage v cc = 1.2 v - - 0.3 - 0.3 v v cc = 2.0 v - - 0.6 - 0.6 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v - - 1.35 - 1.35 v v cc = 6.0 v - - 1.80 - 1.80 v i i input leakage current v i =v cc or gnd v cc = 3.6 v - - 1.0 - 1.0 m a v cc = 6.0 v - - 2.0 - 2.0 m a i s(off) off-state leakage current v i = v ih or v il ; see figure 9 v cc = 3.6 v - - 1.0 - 1.0 m a v cc = 6.0 v - - 2.0 - 2.0 m a i s(on) on-state leakage current v i = v ih or v il ; see figure 10 v cc = 3.6 v - - 1.0 - 1.0 m a v cc = 6.0 v - - 2.0 - 2.0 m a i cc supply current v i = v cc or gnd; i o = 0 a v cc = 3.6 v - - 20 - 40 m a v cc = 6.0 v - - 40 - 80 m a d i cc additional supply current per input; v i = v cc - 0.6 v; v cc = 2.7 v to 3.6 v - - 500 - 850 m a c i input capacitance - 3.5 - - - pf c sw switch capacitance independent pins nyn - 5 - - - pf common pins nz - 8 - - - pf
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 8 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 9.1 test circuits 9.2 on resistance v i = v cc or v ee and v o = v ee or v cc .v i = v cc or v ee and v o = open circuit. fig 9. test circuit for measuring off-state leakage current fig 10. test circuit for measuring on-state leakage current i s i s 001aak345 v cc v i switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc ny1 1 2 v o i s 001aak346 gnd v o switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc ny1 1 2 v i table 7. on resistance at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for graphs see figure 11 and figure 12 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max r on(peak) on resistance (peak) v i = 0 v to v cc - v ee v cc = 1.2 v; i sw = 100 m a [2] -- - - - w v cc = 2.0 v; i sw = 1000 m a - 180 365 - 435 w v cc = 2.7 v; i sw = 1000 m a - 115 225 - 270 w v cc = 3.0 v to 3.6 v; i sw = 1000 m a - 100 200 - 245 w v cc = 4.5 v; i sw = 1000 m a - 75 150 - 180 w v cc = 6.0 v; i sw = 1000 m a - 70 140 - 165 w d r on on resistance mismatch between channels v i = 0 v to v cc - v ee v cc = 1.2 v; i sw = 100 m a [2] -- - - - w v cc = 2.0 v; i sw = 1000 m a-5- - - w v cc = 2.7 v; i sw = 1000 m a-4- - - w v cc = 3.0 v to 3.6 v; i sw = 1000 m a -4 - - - w v cc = 4.5 v; i sw = 1000 m a-3- - - w v cc = 6.0 v; i sw = 1000 m a-2- - - w
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 9 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch [1] typical values are measured at t amb =25 c. [2] when supply voltages (v cc - v ee ) near 1.2 v the analog switch on resistance becomes extremely non-linear. when using a supply of 1.2 v, it is recommended to use these devices only for transmitting digital signals. r on(rail) on resistance (rail) v i = gnd v cc = 1.2 v; i sw = 100 m a [2] - 250 - - - w v cc = 2.0 v; i sw = 1000 m a - 120 280 - 325 w v cc = 2.7 v; i sw = 1000 m a - 75 170 - 195 w v cc = 3.0 v to 3.6 v; i sw = 1000 m a - 70 155 - 180 w v cc = 4.5 v; i sw = 1000 m a - 50 120 - 135 w v cc = 6.0 v; i sw = 1000 m a - 45 105 - 120 w r on(rail) on resistance (rail) v i = v cc - v ee v cc = 1.2 v; i sw = 100 m a [2] - 350 - - - w v cc = 2.0 v; i sw = 1000 m a - 170 340 - 400 w v cc = 2.7 v; i sw = 1000 m a - 105 210 - 250 w v cc = 3.0 v to 3.6 v; i sw = 1000 m a - 95 190 - 225 w v cc = 4.5 v; i sw = 1000 m a - 70 140 - 165 w v cc = 6.0 v; i sw = 1000 m a - 65 125 - 150 w table 7. on resistance continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for graphs see figure 11 and figure 12 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 10 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 9.3 on resistance waveform and test circuit r on =v sw /i sw . fig 11. test circuit for measuring r on v 001aak347 gnd v i v sw i sw switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc ny1 1 2 v i = 0 v to v cc - v ee fig 12. typical r on as a function of input voltage v i (v) 0 4.8 1.2 2.4 3.6 001aak348 100 150 50 200 r on ( w ) 0 v cc = 2.0 v v cc = 3.0 v v cc = 4.5 v
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 11 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 10. dynamic characteristics table 8. dynamic characteristics voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 15 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay nyn, nz to nz, nyn; see figure 13 [2] v cc = 1.2 v - 25 - - - ns v cc = 2.0 v - 9 17 - 20 ns v cc = 2.7 v - 6 13 - 15 ns v cc = 3.0 v to 3.6 v [3] - 5 10 - 12 ns v cc = 4.5 v - 4 9 - 10 ns v cc = 6.0 v - 3 7 - 8 ns t en enable time e to nyn, nz; see figure 14 [2] v cc = 1.2 v - 100 - - - ns v cc = 2.0 v - 34 65 - 77 ns v cc = 2.7 v - 25 48 - 56 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -16- - -ns v cc = 3.0 v to 3.6 v [3] - 19 38 - 45 ns v cc = 4.5 v - 17 32 - 38 ns v cc = 6.0 v - 13 25 - 29 ns sn to nyn, nz; see figure 14 [2] v cc = 1.2 v - 125 - - - ns v cc = 2.0 v - 43 82 - 97 ns v cc = 2.7 v - 31 60 - 71 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -20- - -ns v cc = 3.0 v to 3.6 v [3] - 24 48 - 57 ns v cc = 4.5 v - 21 41 - 48 ns v cc = 6.0 v - 16 31 - 37 ns
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 12 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch [1] all typical values are measured at t amb =25 c. [2] t pd is the same as t plh and t phl . t en is the same as t pzl and t pzh . t dis is the same as t plz and t phz . [3] typical values are measured at nominal supply voltage (v cc = 3.3 v). [4] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s ((c l + c sw ) v cc 2 f o ) where: f i = input frequency in mhz, f o = output frequency in mhz c l = output load capacitance in pf c sw = maximum switch capacitance in pf; v cc = supply voltage in volts n = number of inputs switching s (c l v cc 2 f o ) = sum of the outputs. t dis disable time e to nyn, nz; see figure 14 [2] v cc = 1.2 v - 95 - - - ns v cc = 2.0 v - 34 61 - 73 ns v cc = 2.7 v - 26 46 - 54 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -17- - -ns v cc = 3.0 v to 3.6 v [3] - 20 37 - 44 ns v cc = 4.5 v - 18 32 - 38 ns v cc = 6.0 v - 15 25 - 30 ns sn to nyn, nz; see figure 14 [2] v cc = 1.2 v - 90 - - - ns v cc = 2.0 v - 32 59 - 70 ns v cc = 2.7 v - 24 44 - 52 ns v cc = 3.0 v to 3.6 v; c l =15pf [3] -16- - -ns v cc = 3.0 v to 3.6 v [3] - 19 36 - 42 ns v cc = 4.5 v - 17 31 - 36 ns v cc = 6.0 v - 14 24 - 28 ns c pd power dissipation capacitance c l = 50 pf; f i = 1 mhz; v i = gnd to v cc [4] -36- - -pf table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v). for test circuit see figure 15 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 13 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 10.1 waveforms measurement points are given in t ab le 9 . v ol and v oh are typical voltage output levels that occur with the output load. fig 13. nyn, nz to nz, nyn propagation delays 001aak351 nyn or nz input nz or nyn output t plh t phl v cc v ee v m v m v o v ee measurement points are given in t ab le 9 . v ol and v oh are typical voltage output levels that occur with the output load. fig 14. enable and disable times 001aak352 t plz t phz switch off switch on switch on nyn or nz output low-to-off off-to-low nyn or nz output high-to-off off-to-high sn, e input v o v o v ee v ee v cc v ss v m t pzl t pzh 90 % 90 % 10 % 10 % table 9. measurement points supply voltage input output v cc v m v m v x v y < 2.7 v 0.5v cc 0.5v cc v ol + 0.1v cc v oh - 0.1v cc 2.7 v to 3.6 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v > 3.6 v 0.5v cc 0.5v cc v ol + 0.1v cc v oh - 0.1v cc
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 14 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch test data is given in t ab le 10 . de?nitions for test circuit: r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = external voltage for measuring switching times. fig 15. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aak353 v ext v cc v ee v i v o dut c l r t r l r l g table 10. test data supply voltage input load v ext v cc v i t r , t f c l r l t phl , t plh t pzh , t phz t pzl , t plz < 2.7 v v cc 6 ns 50 pf 1 k w open v ee 2v cc 2.7 v to 3.6 v 2.7 v 6 ns 15 pf, 50 pf 1 k w open v ee 2v cc > 3.6 v v cc 6 ns 50 pf 1 k w open v ee 2v cc
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 15 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 10.2 additional dynamic parameters [1] adjust f i voltage to obtain 0 dbm level at output for 1 mhz (0 dbm = 1 mw into 50 w ). [2] adjust f i voltage to obtain 0 dbm level at output for 1 mhz (0 dbm = 1 mw into 600 w ). table 11. additional dynamic characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); v i = gnd or v cc (unless otherwise speci?ed); t r = t f 6.0 ns; t amb = 25 c. symbol parameter conditions min typ max unit thd total harmonic distortion f i = 1 khz; c l = 50 pf; r l =10k w ; see figure 20 v cc = 3.0 v; v i = 2.75 v (p-p) - 0.8 - % v cc = 6.0 v; v i = 5.5 v (p-p) - 0.4 - % f i = 10 khz; c l = 50 pf; r l =10k w ; see figure 20 v cc = 3.0 v; v i = 2.75 v (p-p) - 2.4 - % v cc = 6.0 v; v i = 5.5 v (p-p) - 1.2 - % f ( - 3db) - 3 db frequency response c l = 50 pf; r l =50 w ; see figure 16 [1] v cc = 3.0 v - 180 - mhz v cc = 6.0 v - 200 - mhz a iso isolation (off-state) f i = 1 mhz; c l = 50 pf; r l = 600 w ; see figure 18 [2] v cc = 3.0 v - - 50 - db v cc = 6.0 v - - 50 - db v ct crosstalk voltage between digital inputs and switch; f i = 1 mhz; c l = 50 pf; r l = 600 w ; see figure 21 [2] v cc = 3.0 v - 0.11 - v v cc = 6.0 v - 0.12 - v xtalk crosstalk between switches; f i = 1 mhz; c l = 50 pf; r l = 600 w ; see figure 22 v cc = 3.0 v - - 60 - db v cc = 6.0 v - - 60 - db
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 16 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 10.2.1 test circuits v cc = 3.0 v; gnd = 0 v; v ee = - 3.0 v; r l =50 w ; r source =1k w . fig 16. test circuit for measuring frequency response fig 17. typical frequency response db 001aak355 gnd f i 2r l 2r l c l switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc v cc ny1 1 2 0.1 m f 001aak361 0 5 (db) - 5 f (khz) 10 10 6 10 5 10 2 10 4 10 3 v cc = 3.0 v; gnd = 0 v; v ee = - 3.0 v; r l =50 w ; r source =1k w . fig 18. test circuit for measuring isolation (off-state) fig 19. typical isolation (off-state) as function of frequency db 001aak356 v cc f i 2r l 2r l c l switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc v cc ny1 1 2 0.1 m f 001aak360 - 50 0 (db) - 100 f (khz) 10 10 6 10 5 10 2 10 4 10 3
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 17 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 20. test circuit for measuring total harmonic distortion d 001aak354 gnd f i 2r l 2r l c l switch gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc v cc ny1 1 2 10 m f a. test circuit b. input and output pulse de?nitions v i may be connected to sn or e. fig 21. test circuit for measuring crosstalk voltage between digital inputs and switch 001aak357 v ih or v il v cc switch gnd = v ee s1 to s3 e nz ny0 v cc v cc ny1 1 2 g v 2r l 2r l 2r l 2r l c l v o 001aaj908 on v o v ct off off logic input (sn, e)
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 18 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch a. switch closed condition b. switch open condition fig 22. test circuit for measuring crosstalk between switches 001aak358 gnd v o 2r l 2r l c l r l 2r l gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc v cc 2r l v cc ny1 v i 0.1 m f db 001aak359 gnd v i 2r l 2r l r l 2r l gnd = v ee s1 to s3 e nz ny0 v ih or v il v cc v cc 2r l v cc 2r l v cc ny1 v o c l db
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 19 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 11. package outline fig 23. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 dip16: plastic dual in-line package; 16 leads (300 mil) sot38-4
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 20 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 24. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 21 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 25. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 22 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 26. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 23 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch fig 27. package outline sot763-1 (dhvqfn16) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.6 3.4 d h 2.15 1.85 y 1 2.6 2.4 1.15 0.85 e 1 2.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot763-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot763-1 dhvqfn16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 27 15 10 9 8 1 16 x d e c b a terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 24 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 12. abbreviations 13. revision history table 12. abbreviations acronym description cmos complementary metal-oxide semiconductor esd electrostatic discharge hbm human body model mm machine model ttl transistor-transistor logic table 13. revision history document id release date data sheet status change notice supersedes 74lv4053_4 20090810 product data sheet - 74lv4053_3 modi?cations: ? the format of this data sheet has been redesigned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? added type number 74lv4053bq (dhvqfn16 package) ? r on values changed in section 2 . ? package version sot38-1 changed to sot38-4 in section 3 , and figure 23 . 74lv4053_3 19980623 product speci?cation - 74lv4053_2 74lv4053_2 19970715 product speci?cation - -
74lv4053_4 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 04 10 august 2009 25 of 26 nxp semiconductors 74lv4053 triple single-pole double-throw analog switch 14. legal information 14.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 14.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 14.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 14.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 15. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lv4053 triple single-pole double-throw analog switch ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 10 august 2009 document identifier: 74lv4053_4 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 16. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 functional description . . . . . . . . . . . . . . . . . . . 5 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 recommended operating conditions. . . . . . . . 6 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 7 9.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 9.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 8 9.3 on resistance waveform and test circuit . . . . . 10 10 dynamic characteristics . . . . . . . . . . . . . . . . . 11 10.1 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 10.2 additional dynamic parameters . . . . . . . . . . . 15 10.2.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 11 package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 12 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24 13 revision history . . . . . . . . . . . . . . . . . . . . . . . . 24 14 legal information. . . . . . . . . . . . . . . . . . . . . . . 25 14.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 25 14.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 14.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 14.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 15 contact information. . . . . . . . . . . . . . . . . . . . . 25 16 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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